Novena DVT Issue Log

From Studio Kousagi Wiki
Revision as of 18:10, 24 June 2013 by Bunnie (talk | contribs) (Distribution Log)
Jump to: navigation, search

Hardware Bringup Notes

  • The DDR3 timing has shifted with the new PCB vendor. The hard-coded timings for Micron memories probably needs to be recalibrated.
  • R20S/C16S needs tuning, for sure. The default values break Gbit ethernet. Simply removing R20S does restore bandwidth, but the matter warrants further investigation.
  • The heartbeat LED D14D is installed 90 degrees rotated. It still lights, it just fires downwards instead of to the side.
  • Y10U/Y11U are missing per factory notes. They must be hand-installed for USB to work.
  • C11M, C30M, C18M, C52C C45M capacitor is 1210 instead of 1206. Factory has been notified of the mis-ordering of the part.
  • R57B 100 ohm -> move to DNP because there is on-chip termination for the FPGA

Quick Tests

Helpful: stty rows 72 columns 132

Distribution Log

SN001: bunnie

  • first time pass

SN002: xobs

  • first time pass

SN003: bn.d

  • ASIX chip has bad solder joints; now fixed, runs at 8428kiB
  • Gbit: 3685kiB
  • 2GB single-rank Crucial SO-DIMM
  • USB ok

SN004: ra.e

  • Gbit: 8600kiB (limited by hub)
  • ASIX: 8400kiB
  • 4GB dual-rank Crucial SO-DIMM
  • USB ok

SN005: te.r

  • 4GB dual-rank PNY SO-DIMM
  • Gbit: 3700kiB
  • ASIX: 8319kiB
  • USB ok