Topic: Liberating the Xilinx CSG324
The current state of freedom for FPGAs is awful. All usable
toolchains are proprietary and the bitstream formats are undisclosed.
As we all know, FPGAs are very powerful tools and its great that we
have one in the Novena, but we cannot hack on it without giving away
control of our computing. I have never used a HDL to program an FPGA,
but I did find a project called fpgatools that is able to generate
a working bitstream for a particular model of Xilinx FPGA. Its input
format is not an HDL but something much lower level that perhaps a
compiler could target. The fpgatools codebase is quite messy and
undocumented, but they do have an interface to add support for
additional Xilinx chips. So, I converted the pinout diagram for the
CSG324 to the necessary C source code and submitted it upstream where
it was accepted. This is only the first piece of the puzzle. More
code is needed to actually be able to generate bitstreams, and quite
frankly I'm afraid to try. I don't have the experience necessary in
FPGA hacking nor reverse engineering to avoid frying the thing with a
So, does anyone out there who actually knows what they are doing want
to help liberate the Xilinx CSG324 for the Novena? I think it's a
very important project in order to make the Novena fully freedom
friendly and to improve the state of freedom for FPGA users and
developers in general. I'd also be interested to hear about
alternatives to fpgatools, if there are any.
Thanks and happy hacking.