• Registered: 2016-08-02
  • Posts: 9

Topic: Someone tested FPGA code ?

Hi everyone,
i got somme errors running the implementation with ISE 14.7 :
[NgdBuild 604] logical block 'lcd_input_top/line_fifo0' with type 'fifo_2kx18' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, case mismatch between the block name and the edif or ngc file name, or the misspelling of a type name. Symbol 'fifo_2kx18' is not supported in target 'spartan6l'.

Any solution ?

  • Registered: 2016-08-02
  • Posts: 9

Re: Someone tested FPGA code ?

Finally, i succeed to run the FPGA code provided and it works fine. Now, i wish to understand this code.
Any help ?

  • Registered: 2018-11-28
  • Posts: 2

Re: Someone tested FPGA code ?

Ran into this same issue, what did you do to solve it?

  • Registered: 2018-11-28
  • Posts: 2

Re: Someone tested FPGA code ?

solved got it building by re-instantiating a new 2kx18 fifo with fifo_generator_9_3_0