Topic: Someone tested FPGA code ?
i got somme errors running the implementation with ISE 14.7 :
[NgdBuild 604] logical block 'lcd_input_top/line_fifo0' with type 'fifo_2kx18' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, case mismatch between the block name and the edif or ngc file name, or the misspelling of a type name. Symbol 'fifo_2kx18' is not supported in target 'spartan6l'.
Any solution ?